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简介：Transactionalmemory(TM)isanewpromisingconcurrency-controlmechanismthatcanavoidmanyofthepitfallsofthetraditionallock-basedtechniques.TMsystemshandledataracesbetweenthreadsautomaticallysothatprogrammersdonothavetoreasonabouttheinteractionofthreadsmanually.TMprovidesaprogrammingmodelthatmaymakethedevelopmentofmulti-threadedprogramseasier.MuchworkhasbeendonetoexplorethevariousimplementationstrategiesofTMsystemsandtoachievebetterperformance,butlittlehasbeendoneonhowtoformallyreasonaboutprogramsusingTMandhowtomakesurethatsuchreasoningissound.Inthispaper,wefocusonthesemanticsoftransactionalmemoryandpresentaproof-carryingcode(PCC)systemforreasoningaboutprogramsusingTM.WeformalizeourreasoningwithrespecttotheTMsemantics,proveitssoundness,anduseexamplestodemonstrateitseffectiveness.

简介：Engineeringapplicationdomainsneeddatabasemanagementsystemstosupplythemwithagoodmeansofmodeling,ahighdataaccessefficiencyandalanguageinterfacewithstrongfunctionality.Thispaperpresentsasemantichypergraphmodelbasedonrelations,inordertoexpressmany-to-manyrelationsamongobjectsbelongingtodifferentsemanticclassesinengineeringapplications.Amanagementmechanismexpressedbythemodelandthebasicdataofengineeringdatabasesaremanagedinmainmemory.Especially,differentobjectsarelinkedbydifferentkindsofsemanticsdefinedbyusers,thereforethetableswap,therecordswapandsomeunnecessaryexaminationsarreducedandtheaccessefficiencyoftheengineeringdataisincreased.Clanguageinterfacethatincludessomegenericandspecialfunctionalityisproposedforcloserconnectionwithapplicationprograms.

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简介：处理的大数据正在成为数据中心计算的固执己见者部分。然而，最近的研究显示了大数据工作量不能充分利用现代记忆系统。我们发现处理的大数据的戏剧的无效从缓存失误的庞大的数量和看情况的存储器存取的货摊。在这篇论文，我们介绍二优化处理这些问题。第一是slice-and-merge策略，它减少种类过程的缓存失误率。第二优化是direct-memory-access，它改革在钥匙/值的存储使用的数据结构。这些优化被评估与微基准并且真实世界的基准HiBench。结果我们的微基准清楚地以硬件事件计数表明我们的优化的有效性；并且HiBench的另外的结果显示出1.21X一般水准加速在上申请级。两结果说明那小心的硬件/软件合作设计将改进大数据处理的存储器效率。我们的工作已经集成于为ApacheHadoop的Intel分发。

简介：Thispaperisconcernedwiththedesignofamemorystatefeedbackcontrollerforlinearsystemswithintervaltime-varyingdelays.Thetimedelayisassumedtobeatime-varyingcontinuousfunctionbelongingtoagiveninterval,whichmeansthatthelowerandupperboundsoftime-varyingdelayareavailable.First,alessconservativedelay-range-dependentstabilitycriteriaisproposedbyusinganewintervalfractionmethod.Intheprocessofcontrollersynthesis,thehistoryinformationofsystemisconsideredinthecontrollerdesignbyintroducingthelowerdelaystate.Moreover,theusualmemorylessstatefeedbackcontrollerfortheunderlyingsystemscouldbeconsideredasaspecialcaseofthememorycase.Finally,twonumericalexamplesaregiventoshowtheeffectivenessoftheproposedmethod.

简介：Themulticoreevolutionhasstimulatedrenewedinterestsinscalingupapplicationsonshared-memorymultiprocessors,significantlyimprovingthescalabilityofmanyapplications.Butthescalabilityislimitedwithinasinglenode;thereforeprogrammersstillhavetoredesignapplicationstoscaleoutovermultiplenodes.Thispaperrevisitsthedesignandimplementationofdistributedsharedmemory(DSM)asawaytoscaleoutapplicationsoptimizedfornon-uniformmemoryaccess(NUMA)architectureoverawell-connectedcluster.ThispaperpresentsMAGI,anefficientDSMsystemthatprovidesatransparentsharedaddressspacewithscalableperformanceonaclusterwithfastnetworkinterfaces.MAGIisuniqueinthatitpresentsaNUMAabstractiontofullyharnessthemulticoreresourcesineachnodethroughhierarchicalsynchronizationandmemorymanagement.MAGIalsoexploitsthememoryaccesspatternsofbig-dataapplicationsandleveragesasetofoptimizationsforremotedirectmemoryaccess(RDMA)toreducethenumberofpagefaultsandthecostofthecoherenceprotocol.MAGIhasbeenimplementedasauser-spacelibrarywithpthread-compatibleinterfacesandcanrunexistingmultithreadedapplicationswithminimizedmodifications.WedeployedMAGIoveran8-nodeRDMA-enabledcluster.ExperimentalevaluationshowsthatMAGIachievesupto9.25:4speedupcomparedwithanunoptimizedimplementation,leadingtoasealableperformanceforlarge-scaledata-intensiveapplications.

简介：Newnon-volatilememory(NVM)technologiesareexpectedtoreplacemainmemoryDRAM(dynamicrandomaccessmemory)inthenearfuture.NANDflashtechnologicalbreakthroughshaveenabledwideadoptionofsolidstatedrives(SSDs)instoragesystems.However,flash-basedSSDs,bynature,cannotavoidlowenduranceproblemsbecauseeachcellonlyallowsalimitednumberoferasures.ThiscangiverisetocriticalSSDreliabilityissues.SincemanySSDwriteoperationseventuallycausemanySSDeraseoperations,reducingSSDwritetrafficplaysacrucialroleinSSDreliability.ThispaperproposestwoNVM-basedbuffercachepolicieswhichcanworktogetherindifferentlayerstomaximallyreduceSSDwritetraffic:amainmemorybuffercachedesignnamedHierarchicalAdaptiveReplacementCache(H-ARC)andaninternalSSDwritebufferdesignnamedWriteTrafficReductionBuffer(WRB).H-ARCconsidersfourfactors(dirty,clean,recency,andfrequency)toreducewritetrafficandimprovecachehitratiosinthehost.WRBreducesblockerasuresandwritetrafficfurtherinsideanSSDbyeffectivelyexploitingtemporalandspatiallocalities.ThesetwocomprehensiveschemessignificantlyreducetotalSSDwritetrafficateachdifferentlayer(i.e.,hostandSSD)byupto3x.Consequently,theyhelpextendSSDlifespanwithoutsystemperformancedegradation.